Conference Agenda

Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).

 
 
Session Overview
Date: Monday, 15/Sept/2025
8:30am - 6:00pmPre-Registration
9:00am - 1:00pmSC 1: Short Course

"Advanced Substrates for Chiplets, Heterogeneous Integration, and Co-Packaged Optics"
Short Course Instructor: John Lau, Unimicron Technology Corporation

9:00am - 1:00pmSC 2: Short Course

"Microelectronics packaging basics in practice!"
Short Course Instructor: Valerie Volant, STMicroelectronics

9:00am - 1:00pmSC 3: Short Course

Further information will follow shortly.
2:00pm - 6:00pmSC 4: Short Course

"From Wafer to Panel Level Packaging"
Short Course Instructors: Tanja Braun & Markus Wöhrmann, Fraunhofer IZM

2:00pm - 6:00pmSC 5: Short Course

"Electronic/Photonic Convergence Using Advanced Packaging: A Status"
Short Course Instructor: Stéphane Bernabé, CEA LETI

2:00pm - 6:00pmSC 6: Short Course

Further information will follow shortly.
Date: Tuesday, 16/Sept/2025
9:00am - 9:10amWelcome & Conference Opening
9:10am - 9:55amKeynote 1
Location: Amphitheatre

"Propelling AI forward through Advanced Packaging Creativity"
by Ingu Yin Chang (Executive Vice President, ASE Inc.)

9:55am - 10:40amKeynote 2
Location: Amphitheatre

"The Interconnect 'Panelization'"
by Laurent Herard (Group VP – Head of Back End Manufacturing & Technology R&D, STMicroelectronics)

10:40am - 11:15amBreak – Exhibition
11:15am - 12:30pmS 1A: IC Packaging
Location: Amphitheatre
 

Development of Die Attach Process for Thin Device Using a Novel High Thermal Conductivity Pressure-less Semi-sintering Paste with Capillary Filling Technology

Shogo Nakano1, Low Shuey Seng1, Nicoletta Modarelli2, Matteo Luca Quattrocchio2

1Sumitomo Bakelite Co., Ltd.; 2STMicroelectronics



A Novel Package Technology for Better MOSFET Performance

Arnel Taduran, Ilyas Dchar, Ding Yandoc

Nexperia, United Kingdom



Fan Out Wafer Level Packaging – Towards a European Manufacturing Supply Chain

Marc Dreissigacker1, Daniel Lieske1, Tanja Braun2, Markus Wöhrmann2

1AEMtec GmbH, Germany; 2Fraunhofer IZM, Germany

 
11:15am - 12:30pmS 1B: Intreconnection Technologies
Location: Kilimandjaro
 

Material Strategy and Challenges for Fine Interconnection in Advanced Packages

Kazuyuki Mitsukura

Resonac



Stability of the Superconducting β-Sn Phase at Low Temperatures for 3D Cryogenic Packaging

Meriem Guergour, Feautrier Céline, Patrice Gergaud, Nicolas Vaxelaire, Guillaume Freychet, Maria-luisa Calvo-Munoz, Pierre-Emile Philip, Edouard Deschaseaux, Candice Thomas, Jean Charbonnier

Cea, France



Integration of Photo-imaging Technology and Microvias in LTCC for Enhanced High-frequency Applications and Packaging

Kathrin Reinhardt, Adrian Goldberg, Birgit Manhica, Lynn Ratajczak, Martin Ihle

Fraunhofer IKTS, Germany

 
11:15am - 12:30pmS 1C: Quality and Reliability
Location: Mont Blanc
 

Study of a Failure of a Compact Ceramic No-lead Package Due to Tinning Induced Thermal Shock and Its Design Improvement

Qiaochu Guo1,2, Yi Cui1,2, Sijia Cao1,2, Jinhua Zhou1,2, Shuping Meng1,2

1Beijing Institute of Precision and Mechatronics and Controls; 2Laboratory of Aerospace Servo Actuation and Transmission



Assessment of QFN Assemblies’ Thermal Strain Characterization and its Evolution Through Thermal Cycling Aging

Vincent Sisomseun1,3, Olivier Maire1, Pascal Retailleau1, Catherine Jephos2, Alexandrine Guédon-Gracia3, Hélène Frémont3

1MBDA France, France; 2DGA MI, France; 3IMS Bordeaux, France



Embedding of components as an effective way to achieve high reliability for special applications products

Marek Koscielski, Wojciech Steplewski, Anna Sitek, Dorota Liszewska, Adam Lipiec, Janusz Borecki

Łukasiewicz Research Network - ITR, Poland

 
11:15am - 12:30pmS 1D: Assembly and Manufacturing
Location: Makalu
 

Development of Advanced Screen-printing Technology for Flip-chip Transfer of Electronic Components

David Henry, Daniel Mermin, Rémi Franiatte, Delphine Rolland, Catherine Brunet-Manquat, Thierry Flahaut, Damien Saint-patrice, Bruno Fain, Hélène Lhermet, Jean-Claude Bastien, François Blard, Emmanuel Ollier

CEA, France



Thinning and Dicing Process Integration of High Accuracy Using A Novel Self-assembly Stage for Chip on Wafer

Tadatomo Yamada, Ken Takano, Toshiaki Menjo, Shinya Takyu

LINTEC Corporation, Japan



A Study of 355 nm UV Laser Ablation Process for Singulation of Silicon Wafers

Serguei Stoukatch, Francois Dupont, Jean-Michel Redouté

Microsys lab, Department of Electrical Engineering and Computer Science, University of Liège, Belgium

 
12:30pm - 1:50pmLunch – Exhibition
1:50pm - 3:05pmS 2A: Interconnection Technologies
Location: Amphitheatre
 

Characterization of Chip-to-wafer Interconnects with Thick Gold Finish for Fan-out Wafer-level Packaging RDL First Integration

Arnaud Garnier, Laetitia Castagné, Guenaëlle Massignac, Rémi Franiatte, Daniel Mermin, Alain Gueugnot, Perceval Coudrain

Univ. Grenoble Alpes, CEA, Leti, Grenoble, France



Fine-pitch Die-to-wafer Bonding Technologies for Chiplet Integration

Juliana Panchenko1,2, Laura Wenzel1,2, Steffen Bickel1, Adil Shehzad1, Fabian Hopsch3, Sebastian Quednau4, Manuela Junghaehnel1

1All Silicon System Integration Dresden, Fraunhofer Institute for Reliability and Microintegration IZM, Dresden, Germany; 2Institute of Electronic Packaging Technology, Technische Universität Dresden, Dresden, Germany; 3Institutsteil Entwicklung Adaptiver Systeme EAS, Fraunhofer-Institut für Integrierte Schaltungen IIS, Dresden, Germany; 4Nanowired GmbH, Emanuel-Merck-Straße 99, Gernsheim, Germany



Fabrication of Indium Interconnections for Flip-chip Assembly on Single Die

Mel Dehays, Sébastien Renet, Olivier Mailliart, Patrick Peray, Frédéric Berger, Guillaume Lamarache

Commissariat à l'énergie atomique (CEA), France

 
1:50pm - 3:05pmS 2B: Design, Modelling and Simulation
Location: Kilimandjaro
 

A Methodology for Modeling Capillary Underfill (CUF) in Advanced Packaging

Dariush Ghaffari Tari1, Arsia Khanfekr1, Rong Zhang1, Jeffrey Grover1, Ning Liu1, Kail Shim1, Manuel Schiel2, Matthew Tsai1, Rossette Guino3

1Henkel, United States of America; 2Henkel AG & Co. KGaA; 3Henkel Asia Pacific



Simulation-based Analysis of Thermal Effects Induced by RF Interference in MEMS Microphones

Yogesh Babu1, Sebastian Kisban3, Matthias Winter1, Matthias Schmidt3, Margarita Chizh2, Gregor Feiertag2

1Rosenheim University of Applied Sciences, Rosenheim, Germany; 2Munich University of Applied Sciences, Munich, Germany; 3TDK Electronics AG, Munich, Germany



Numerical Case Study of Stress and Plastic Strain Distributions in BGA Solder Balls by Comparison of a Novel Inorganic Encapsulation and Conventional Underfill Variants

Alexander Reichel, Falk Naumann, Sandy Klengel

Fraunhofer Institute for Microstructure of Materials and Systems IMWS, Halle (Saale), Germany

 
1:50pm - 3:05pmS 2C: System in Package
Location: Mont Blanc
 

Research on Damage Behaviour of Vertical Interconnection Solder Joints in a RF SiP Module

Hui Xiao, Baojun Qiu, Jiahao Liu, Tao Lu, Xiaodong Chen, Daojun Luo

China Electronic Product Reliability and Environmental Testing Research Institute, China, People's Republic of



A Miniaturized Dual Band (28/39 GHz) AiP Design for Millimeter-Wave 5G Mobile Phone Applications

Sheng-Chi Hsieh

Advanced Semiconductor Engineering, Inc.(ASE group), Taiwan



Development of a 3D Quilt Packaging Method for Implantable Applications

Chloé Bernardoni1, Ahmad Shah Idil1,2, Lewis Keeble1, Timothy Constandinou1,2

1Imperial College London, United Kingdom; 2Mint Neurotechnologies Ltd

 
1:50pm - 3:05pmS 2D: Materials
Location: Makalu
 

Bi–in Segregation in Low-temperature SLID Bonding: Au-in-bi System

Gayathry Thampi, Hoang Vu Nguyen, Knut Eilif Aasmundtveit

University of South Eastern Norway, Norway



Large Area (> 2500mm²) Sintering at Sub 220°C With Micro-scale Copper Flakes

Rohan Ghosh1, Olaf Rämer2, Gomathi Varshini Kanthi Natarajan1, Sri Krishna Bhogaraju1

1CuNex GmbH, Ingolstadt, Germany; 2Technische Universität Berlin, Berlin, Germany



Influence of Total Encapsulation of White-light Mid-power LED Packages Over the Correlated Colour Temperature

Edward André Olivera Apaza, Matthias Hien, Mahmoud Beker, Markus Zankl

THD Technologie Campus Cham, Germany

 
3:05pm - 3:40pmBreak – Exhibition
3:40pm - 4:25pmKeynote 3
Location: Amphitheatre

"Mass Transfer: How the Push for MicroLED Displays Opens New Paths to Heterogeneous Integration"
by Dr. Chris Bower (CTO and co-founder, X Display Company (XDC)., Inc.)

4:25pm - 4:35pmRoom Change
4:35pm - 5:50pmS 3A: Materials
Location: Amphitheatre
 

Exploration of Cu Interfacial Engineering to Enhance Cu Interconnects Reliability

Kevin Antony Jesu Durai, Dinesh Kumar Kumaravel, Shyam Muralidharan Nair, Khanh Tran, Shinoj Sridharan Nair, Oliver Chyan

University of North Texas, United States of America



Tailored Polymers for Wafer-level Optics Manufacturing via Nanoimprint Lithography

Patrick Schirmer, Heinrich Trischler, Stephan Prinz

DELO Industrial Adhesives, Germany



Evaluations of Transient Liquid Phase Joints Using In-coated Ag Sheet

Xunda Liu, Hiroaki Tatsumi, Zhi Jin, Hiroshi Nishikawa

Osaka University, Japan

 
4:35pm - 5:50pmS 3B: Power Electronics
Location: Kilimandjaro
 

Promoting EMC Adhesion to Copper Leadframe Through Oxide Thickness Optimization

Céline Feautrier1, Benoit Saudet1, David Henry1, Christophe Licitra1, Nicolas Gauthier1, Paul-Henri Haumesser1, Ky-Lim Tan2, Hicham Aytous3, Jean-Michel Morel2

1Univ. Grenoble Alpes, CEA, Leti, F-38000 Grenoble, France; 2Valeo, Créteil, France; 3Valeo, Sable sur Sarthe, France



Thermal and Structural Analysis of GaN Layers on Foreign Substrates for Vertical Power Devices

Verena Leitgeb1, Sandra Fischer1, Lisa Mitterhuber1, Barbara Kosednar-Legenstein1, Frank Brunner2, Eldad Bahat-Treidel2, Elke Kraker1

1Materials Center Leoben Forschung GmbH, Austria; 2Ferdinand-Braun-Institut, Germany



The next generation die top system (Ag-only DTS®) for Cu wire bonding on SiC chips

Thorsten Vehoff, Jürgen Scharf, Benjamin Fabian, Steffen Kötter, Vemal Raja Manikam

Heraeus Electronics GmbH & Co KG, Germany

 
4:35pm - 5:50pmS 3C: Qulaity and Reliability
Location: Mont Blanc
 

The Effect of Solder Die Attach Voids on the Junction-to-case Thermal Resistance of MOSFET Packages

Tao Lu, Baojun Qiu, Xiaodong Chen, Hui Xiao, Daojun Luo

CEPREI Laboratory, China, People's Republic of



Experimental and Numerical Investigation of the Impact of Surface Roughness of Copper Plated through Holes on Thermomechanical Reliability

Janine Conrad1, Martin Schneider-Ramelow1, Olaf Wittler2

1Technische Universität Berlin, Germany; 2Fraunhofer IZM Berlin, Germany



The Impact of Processing Conditions on Bond Reliability in Pressureless Silver Sintering

Rajrupa Paul, Francesca Vita, Corentin Seibert, Reza Soleimanzadeh, Jean-Yves Loisy, Stephan Wirths

Hitachi Energy Ltd., Switzerland

 
4:35pm - 5:50pmS 3D: Assembly and Manufactuirng
Location: Makalu
 

A New Carrier Tape for Direct Transfer Bonding (DTB) Process with Ultra-thin Chips

Tomoka Kirihata1, Masanori Yamagishi1, Yusuke Fumita1, Ichiro Sano2, Jun Kaneyasu2, Shinya Takyu1

1LINTEC Corporation, Japan; 2TAZMO CO.,LTD., Japan



Ultra-precise Dispensing for High-resolution Redistribution Layers and 3D Interconnects in Advanced Packaging Applications

Filip Granek, Piotr Kowalczewski

XTPL SA, Poland



Plasma Influence for Polymer Uniform Spreading on Heterogeneous Surfaces

Chloé Schubert, Nohora Caicedo, Sylvain Revol, Laurence Capellaro

ST Microelectronis, France

 
6:00pm - 7:30pmDinner: Tasting of regional products & Exhibitors' time (TBC)
Date: Wednesday, 17/Sept/2025
9:00am - 9:45amKeynote 4
Location: Amphitheatre

"Recent Trends in Automotive Power Module Designs and Technology for Traction Inverters"
by Dr. Uwe Hansen (VP Power Component Development, Bosch)

9:45am - 10:30amKeynote 5
Location: Amphitheatre

"System Technology Co-optimization for Advanced 3D & Heterogeneous Integration"
by Sébastien Dauvé (CEO, CEA-Leti)

10:30am - 11:15amBreak – Posters – Exhibition
11:15am - 12:30pmS 4A: Assembly and Manufacturing
Location: Amphitheatre
 

In-situ Plasma Monitoring Study for Wire Bonding Process Improvements

Nohora Caicedo, Patricia Folio, Valentin Ray, Laurence Capellaro, Justin Catania

ST Microelectronis, France



Impact and Control of Residual Stress in Ceramic Packages

Markus Eberstein1, William Kuhblank1, Rita Cicconi2, Dominique de Ligny2, Daniel Apel3, Mirko Boin3

1ASML Berlin, Germany; 2FAU Erlangen; 3Helmholtz-Zentrum Berlin



Wafer dicing technique for close-butted assemblies

Sarah Renault, Aurélia Plihon, Emerick Lorent, Myriam Tournaire, Nicolas Bresson, Delphine Rolland

CEA Grenoble, France

 
11:15am - 12:30pmS 4B: Design, Modelling and Simulation
Location: Kilimandjaro
 

Intelligent Prediction of Warpage in Molded fcBGA Packages: An Optimization and Modeling Approach

Tang-Yuan Chen

Advanced Semiconductor Engineering, Inc., Taiwan



Comparative FEA Analysis of Cu Clip and Al Wire Bonding in Power Discrete Packages

Na-Yeon Choi, Sung-Uk Zhang

Dong-Eui University, Korea, Republic of (South Korea)



Investigation of thermal performance of various thermal interface materials used in top-side-cooled MOSFETs

Kshitij Anil Kolas1, Puneet Sharma1, Roman Boldyrjew-Mast1, Maurizio Tranchero2, Sven Rzepka1

1Fraunhofer Institute for Electronic Nano Systems, Germany; 2Ideas & Motion s.r.l, Cherasco, Italy

 
11:15am - 12:30pmS 4C: IC Packagimg
Location: Mont Blanc
 

Impact of PFAS Removal on the Harsh Environment Reliability of Semiconductor Packaging

Pradeep Lall, Padmanava Choudhury, Aathi Pandurangan

Auburn University, United States of America



FC-LGA for Power Devices: Peculiarities and Challenges Compared with Digital Products

Stefano Cacciamani, Cristina Somma, Fabrice De Moro, Laurent Figuiere, Lou Roulon, Jerome Lopez, Ludovic Fourneaud

STMicroelectronics



Modular Integration of Sensor-Chiplets using Rapid Prototyping including Interconnects and Protective Waveguide Packaging

Severin Schweiger, Harshitha Karnam, Sören Köble, Matthias Wambold, Nicolas Lange

Fraunhofer Institute for Photonic Microsystems – IPMS, Germany

 
11:15am - 12:30pmS 4D: POSTER SESSION #1
Location: Makalu
 

Thermomechanical Study for Stress-management of Silicon Photonics Interposers

Céline Feautrier, Benoit Saudet, Jean Charbonnier, Edouard Deschaseaux, Damien Saint-Patrice, Rémi Vélard, Myriam Assous

Univ. Grenoble Alpes, CEA, Leti, F-38000 Grenoble, France



Study on the Influence of Reflow Soldering on the Reliability of Mixed Solder Joints

Xiaodong Chen, Baojun Qiu, Zengxiong Zheng, Hui Xiao, Jiang Xie, Tao Lu, Daojun Luo

China CEPREI Laboratory, China, People's Republic of



Reusing SMD Components on E-textiles: An Ageing Study by Combination of Corrosive Gases and Washing

Martin Hirman, Jiri Navratil, Andrea Benesova, Frantisek Steiner

University of West Bohemia, Faculty of Electrical Engineering, Czech Republic



A Comparative Study of Silver Sintering Pastes for Die-attach Applications: Microstructure, Mechanical Properties, and Reliability

Jiri Hlina, Martin Hirman, David Michal, Martin Janda

University of West Bohemia, Czech Republic



Design and Evaluation of a Perforated Dielectric Flat Lens Antenna Array for D-band Applications

Yen Ting Wang, Po-An Lin, Huei-Shyong Cho, Shih-wen Lu, Wei-Tung Chang

Advanced Semiconductor Engineering, Inc., Taiwan



A High Gain Antenna-in-Package (AiP) with Horn Structure for D-band Applications

Po-An Lin, Shao-En Hsu, Shih-Wen Lu, Yu-Chang Chen, Jen-Chieh Kao

Advanced Semiconductor Engineering, Inc. (ASE), Taiwan



Fine-pitch Flip-chip Bonding Process with Laser Non-conductive Paste (NCP) and Laser-assisted Bonding (LAB) for High-reliability

Ki-Seok Jang, Yong-Sung Eom, Gwang-Mun Choi, Jiho Joo, Jungho Shin, Jin-Hyuk Oh, Chan-Mi Lee, Ga-Eun Lee, Seong-Cheol Kim, Kwang-Seong Choi

ETRI, Korea, Republic of (South Korea)



Electrochemical Analysis Reveals Effective Grain Refinement in Copper Electroplating

Rui-Zhe Wu, Tzu-Hsing Chiang, Chen-Chao Wang, Chin-Pin Hung

Advanced Semiconductor Engineering, Inc., Taiwan



Indium as the Superconducting Interconnect for Quantum Chiplets

Jowesh Avisheik Goundar1, Mai Thi Ngoc La2, Yugi Otake2, Hideo Kosaka1, Fumihiro Inoue3

1Institute of Advanced Sciences, Yokohama National University, Japan; 2Graduate School of Engineering, Yokohama National University, Japan; 3Faculty of Engineering, Yokohama National University, Japan



Test Equipment for Sensor Interfaces Emulated by Generic Electronic Control Unit

Nicolae Ioan Gross, Paul Svasta

National University of Sciences and Technologies Politehnica, Bucharest, Romania



Visualizing Vibrations of Electronic Modules in Test

Artem Ivanov

Landshut University of Applied Sciences, Germany



Grain Orientation Analysis for Thermal Cycling Evaluation of Die-attach Solder Joints

Hiroaki Tatsumi1, Yujiro Hayashi2,3, Jaemyung Kim2, Makina Yabashi2,3, Hiroshi Nishikawa1

1The University of Osaka, Japan; 2RIKEN SPring-8 Center, Japan; 3Japan Synchrotron Radiation Research Institute, Japan



Thermal Fatigue Resistance Improvement of New Al Bonding Wire

Motoki Eto1, Noritoshi Araki1, Daizo Oda1, Sandy Klengel2, Robert Klengel2, Tomohiro Uno3

1Nippon Micrometal Corporation, Japan; 2Fraunhofer-Institute for Microstructure of Materials and Systems IMWS; 3Nippon Steel Corporation



Thermal Analysis of Power Electronic Modules with Parametric Model Order Reduction

Sheikh Hassan1, Mark Sherriff2, Pearl Agyakwa2, Paul Evans2, Stoyan Stoyanov1

1School of Computing and Mathematical Sciences, University of Greenwich, London, United Kingdom; 2Department of Electrical and Electronic Engineering, University of Nottingham, Nottingham, United Kingdom

 
12:30pm - 1:50pmLunch Break – Posters – Exhibition
1:50pm - 3:30pmS 5A: Substrate Technologies
Location: Amphitheatre
 

Approach for Extracting the Relative Permittivity of Sol-gel Using a Ring Resonator Fabricated on an LTCC Substrate

Achraf Sadeddine1, Norayr Nessimian2, Camilla Karnfelt1, Heike Bartsch2, Jens Mueller2

1IMT atlantique, France; 2Technische Universität Ilmenau



Insulation Layers on Copper Surfaces of Ceramic Circuit Boards for Smart Power Modules

Claudia Feller, Henry Barth, Stefan Körner, Lars Rebenklau

Fraunhofer Institute for Ceramic Technologies and Systems IKTS, Germany



Optimized Castellated Hole Interconnects for Ceramic-based Modular Millimeter-Wave Applications up to 85 GHz

Paul Perlwitz1, Christian Tschoban1, Uwe Krieger2, Qaisar Khushi Muhammad2, Harald Pötter1, Martin Schneider-Ramelow1

1Fraunhofer IZM, Germany; 2VIA electronic GmbH, Germany



Glasses as substrates for packaging: Remarks on mechanic reliability.

Martin Letz1, Fabian Wagner1, Inge Burger1, Rule Kirchhoff1, Volker Seibert1, Ulrich Peuchert2

1SCHOTT AG, Mainz, Germany; 2SCHOTT Semicon Glass Solutions, Mainz, Germany

 
1:50pm - 3:30pmS 5B: Optoelectronics
Location: Kilimandjaro
 

Precise Alignment and Laser-assisted Bonding of Multichannel Laser Diode Chips for Silicon Photonics Integration

Aleksandr Vlasov, Joel Salmi, Heidi Tuorila, Santeri Lehtinen, Jukka Viheriälä, Mircea Guina

Optoelectronics Research Centre, ENS Faculty, Tampere University, Finland



Assembly Perspectives on Flip-chip Integration of 1x, 4x and 8x Array InP-SiN Hybrid Laser Devices to Si Photonics Wafers with Sub-500 nm Misalignment

Damien Leech1, Sulakshna Kumari1, Huseyin Sar1, Negin Golshani1, Dmitry Kazakov1, Hsiao-Lun Wang1, Francois Chancerel1, Geert Langenus1, Hemant Kumar Tyagi1, Eirini Sarelli1, Sebastian Haensch2, Hanh Mai2, Andreas Ehrl2, Aleksandrs Marinins1, Charles Caer1, Yannick De Koninck1, Stuart Smyth3, Andrew McKee3, Olek Kowalski3, Megan McLelland3, Maumita Chakrabarti1, Dimitrios Velenis1, Peter Verheyen1, Alain Phommahaxay1, Koen Kennes1, Filippo Ferraro1, Yoojin Ban1, Joris van Campenhout1

1imec, Belgium; 2ASMPT, Germany; 3Sivers Photonics, Scotland



TSVs Mechanical Stress Measurements on Silicon Wave-guide Using Phase Shift Interferometry

Jean Charbonnier1, Pierre Tissier2, André Myko1, Stéphane Malhouitre1, Myriam Assous1, Rémi Vélard1, Stéphane Bernabé1

1Univ. Grenoble Alpes, CEA, Leti, Grenoble, France; 2STMicroelectronics Crolles, France



Package and Process Development of Molded Image Sensor Package

Alastair Attard

UTAC Group, Singapore

 
1:50pm - 3:30pmS 5C: Emerging Technologies
Location: Mont Blanc
 

TBM-free Plasma Etch Die Singulation

Partia Naghibi, Aidan Knab

HRL Laboratories, United States of America



Anti-counterfeit Semiconductor Package Using a Unique Identification Mark

Ken Takano1, Tadatomo Yamada1, Toshiaki Menjo1, Sayaka Matsuno1, Shinya Takyu1, Naoki Yoshida2, Iwaki Miyamoto2, Tsutomu Matsumoto3

1LINTEC corporation; 2Yokohama National University; 3National Institute of Advanced Industrial Science and Technology



Metal Oxide Reduction Using Inline Openair-plasma Process to Enhance Adhesion and Improve Durability in Electronics

Shirisha Kulkarni1, Yaser Hamedi1, Nico Coenen1, Daphne Pappas2, Dhia Bensalem1

1Plasmatreat GmbH, Steinhagen, Germany; 2Plasmatreat USA, Haward, USA



Surface Conditioning of LTCC Substrates for Improved RF Signal Propagation

Norayr Nessimian1, Achraf Sadeddine2, Jens Müller1, Heike Bartsch1

1TU Ilmenau, Germany; 2Institut Mines-Télécom, France

 
1:50pm - 3:30pmS 5D: POSTER SESSION #2
Location: Makalu
 

Microelectronic Packaging Challenges for Stacked Superconducting Qubit Chips Using Indium Bump Bonding

Andreas Schneider1, Aswathi Koorikkat1, John D. Lipp1, Marcus J. French1, Narendra Acharya2, Kitti Ratter2, Vivek Chidambaram2, Pawala Ariyathilaka3

1Technology, STFC-RAL, United Kingdom; 2National Quantum Computing Centre (NQCC), STFC, United Kingdom; 3Central Laser Facility (CLF), STFC-RAL, United Kingdom



Flip-chip Bonded Hybrid Germanium X-ray Detectors Suitable for Operating with Thermal Gradient Between Sensor and ASIC

Andreas Schneider1, James Hollingham1, Alexander Dainty1, Toby G. Brookes1, John David Lipp1, Matthew David Wilson1, Marcus Julian French1, Marcello Borri2, Konrad Sutowski2, Daniel Thacker2, Matthew Buckland2, Andrew Hill2, William Helsby2

1STFC-RAL, United Kingdom; 2STFC-DL, United Kingdom



Thermal Management of an Electronic Module Made by a Solderless Assembly Method

Gaudentiu Varzaru1, Roxana Tulea1, Madalin Moise2, Mihai Branzei3, Paul Svasta2

1Syswin Solutions, Romania; 2Electronic Technology & Reliability Department, National University of Science and Technology Politehnica Bucharest, Romania; 3Department of Metallic Materials Sciences, Physical Metallurgy, Faculty of Materials Science and Engineering, National University of Science and Technology Politehnica Bucharest, Romania



Selective Micro Laser Melting: Influence of Scan Speed and Laser Power on Interconnect Morphology and Performance

Arun Kumar Sivakumar, Manish Arora

Indian Institute of Science, Bengaluru, India



Flip Chip Bonding of PMUT Using Adhesives and their Effect on Electrical Performance

Muhammad Hassan Malik, Zhou Da, Rodrigo Tumolin Rocha, Chunlei Xu

Silicon Austria Labs,



Automated Non-destructive Mechanical Testing of Fine Pitch Wirebond Arrays

Lyle Alexander Menk

Sandia National Laboratories, United States of America



Advanced Underfill Developments Enabling Complex AI and HPC Package Designs

Ruud De Wit

Henkel Nederland BV, Netherlands, The



Advanced Dielectric Films for Fusion Bonded 3D Integration

Taisuke Yamamoto, Hayato Kitagawa, Ryosuke Sato, Ryota Ogata, Fumihiro Inoue

Yokohama National University, Japan



Printable non-volatile and volatile memristors based on Lead-Free Perovskites for artificial synapses and neurons emulation

Michalis Loizos, Konstantinos Chatzimanolis, Konstantinos Rogdakis, Emmanuel Kymakis

Hellenic Mediterranean University, Greece



Power modules: Crack and shrinkage phenomenon

Adeline Liger, Vincent Charlot, Jean-Christophe Leroux

PROTAVIC, France



Void inspection using stress field imaging in densely patterned bonded wafers

Zsolt Kovács, Csenge Dobos, Gábor Molnár, Zsolt Kovács, György Nádudvari, Zoltán Kiss

Semilab Co. Ltd., Hungary



Photoresist/polymer removal optimized chemistry with adding hydrogen radical in MEMS process fabrication and other applications with HDRF®

Marc Segers, Giovanni Terenziani, Safia Benkoula

Plasma-Therm Europe, France



Innovative deposition solution for TSV integration and conformal deposition of oxide, nitride, and metal layer with dual frequency pulsed equipment, application of low temperature deposition of dielectric layer

Marc Segers, Pierre-David Szkutnik, Safia Benkoula

Plasma-Therm Europe, France



Temperature Profile Optimization for Vacuum Soldering of Components on Heat Sink

František Steiner1, Martin Hirman1, Pavel Rous1, Václav Wirth2

1University of West Bohemia, Czech Republic; 2Rohde & Schwarz závod Vimperk, s.r.o., Czech Republic



Investigating the Dynamic Bending Behaviour of Biodegradable Printed Circuit Boards

Oliver Krammer, Patrik Kovács, Attila Géczy

Budapest University of Technology and Economics, Hungary



Stacked and Staggered Vias in FR4 laminate for special application

Aneta Cholaj, Krzysztof Lipiec, Andrzej Kiernich, Dariusz Ostaszewski, Miroslaw Kozlowski, Marek Koscielski, Adam Lipiec, Janusz Borecki

Łukasiewicz Research Network - ITR, Poland



Engineering Dual Alloy Solder Paste Systems to Achieve High Reliability, Energy Savings, Withstand High Junction Temperatures

Karthik Vijay

Indium Corporation



Warpage Reduction of Laminate Substrates Through Metamodel-based Optimization of Material Properties

Fredy John Porathur1,2, Fabian Huber1, Eduard Stadler1, Peter Filipp Fuchs3, Dieter Paul Gruber2,4

1CSA R&D ET Packaging Development, Materials and Simulation- ams OSRAM AG, Premstaetten, Austria; 2Institute of Materials Science and Testing of Polymers- Montanuniversität Leoben, Leoben, Austria; 3Simulation and Modeling- Polymer Competence Centre Leoben (PCCL) GmbH, Leoben, Austria; 4Surface Testing, Robot Vision and Artificial Intelligence- Polymer Competence Centre Leoben (PCCL) GmbH, Leoben, Austria

 
3:30pm - 4:05pmBreak – Posters – Exhibition
4:05pm - 5:20pmS 6A: System in Package
Location: Amphitheatre
 

Highly Integrated Low Power Wireless Sensor Node

Luca Maggi1, Marco Del Sarto1, Amedeo Maierna1, Alex Gritti1, Claudio Porzi2, Gaspare Santaera2, Filippo Scotti2, Marc Sorel2, Cesare Stefanini2, Antonella Bogoni2, Piero Castoldi2, Marco Chiesa3, Aina Serrano Rodrigo3, Davide Rotta3

1STMicroelectronics, Italy; 2Scuola Superiore Sant'Anna, Italy; 3CamGraPhIC, Italy



Advancing Fan-Out Wafer-Level Packaging for III-V/CMOS Optoelectronic Transceiver SiP Integration

Perceval Coudrain, Laetitia Castagné, Arnaud Garnier, Raphaël Eleouet, Emmeline Tomas, Rémi Franiatte, Rémi Vélard, Nadia Miloud-Ali, Thierry Mourier

Univ. Grenoble Alpes, CEA, Leti



RF Characterization of Microscale Transmission Lines on Polymer-based Silicon Interposers for HPC Applications

Alexander Gaebler1, Uwe Maaß1, Ivan Ndip1,2, Kai Zoschke1, Marius Adler1

1Fraunhofer IZM, Germany; 2Brandenburg University of Technology (BTU) Cottbus-Senftenberg, Cottbus, Germany

 
4:05pm - 5:20pmS 6B: Quality and Reliability
Location: Kilimandjaro
 

Advanced Defects Repair Techniques for Enhancing Yield in Packaging Architectures

Adam Ginsburg

KLA, Israel



Prognostics and Health Monitoring: Case Study of a Light Rail Vehicle Power Converter Assembly

Darshankumnar Bhat, Stefan Muench, Mathias Kaeso, Mike Roellig, Constanze Tschoepe

Fraunhofer Institute for Ceramic Technologies and Systems IKTS, Germany



Optimizing Ag Paste Thickness for Reliable Power Module Packaging

Ran Liu1, Chuantong Chen1, Yang Liu1, Koji S. Nakayama1, Masahiko Nishijima1, Minoru Ueshima2, Katsuaki Suganuma1

1Osaka University, Japan; 2Daicel Corporation, Japan

 
4:05pm - 5:20pmS 6C: Materials
Location: Mont Blanc
 

Ag-nodule Mediated Bonding Using Liquid Quenched Ag-Si Alloy

Koji S. Nakayama1, Masahiko Nishijima1, Yicheng Zhang1, Chuantong Chen1, Minoru Ueshima2, Katsuaki Suganuma1

1Osaka University, Japan; 2Daicel Corporation, Japan



Thermal Characterization of Electrically Conductive Adhesives and Pressureless Sinter Pastes – Comparison of Data Sheet and Real Application

Antje Steller1, Moritz Schwengber1, Ömer Faruk Yildiz2, Jörg Franke3

1Baker Hughes Inteq GmbH, Germany; 2Novicos GmbH; 3Faculty of Electrical Engineering and Information Technology, Technical University Chemnitz



Characterisation and Modelling of Sintered Joints Used in Power Electronics

Laurent Vivet

Valeo, France

 
5:45pmBus transfer: Busses leaving venue for confernce dinner
7:00pm - 10:00pmConference Dinner
Date: Thursday, 18/Sept/2025
8:45am - 9:30amKeynote 6
Location: Amphitheatre

"Advanced Packaging – The Key Technology for Chiplet Integration"
by Prof. Dr.-Ing. Ulrike Ganesh (Managing Director, Fraunhofer IZM)

9:30am - 9:40amRoom Change
9:40am - 10:55amS 7A: Smart Manufacturing
Location: Amphitheatre
 

Process Development for Cu Metallization on SiC MOSFETs with Inkjet Printing Technology

Xiaojie Tian1, Golzar Alavi1, Bernhard Polzinger1, André Zimmermann2

1Robert Bosch GmbH, Germany; 2University of Stuttgart



Development of a Novel Pure-ag-sintering Paste for a Jet-dispensing Process to Achieve Highest Possible Conductivity for Miniaturized Electronic Components with a Pressure-less Sintering Process

Battist Rábay, Adrian Stelzer, Julien Hossain

Nano-Join GmbH, Germany



Additive Manufacturing of High-Performance Ceramics for Fabricating Single- and Multi-Material Components

Martin Schwentenwein1, Josef Schlacher2, Serkan Nohut1, Sebastian Geier1, Raul Bermejo2

1Lithoz GmbH, Austria; 2Montanuniversitaet Leoben, Austria

 
9:40am - 10:55amS 7B: IC Packaging
Location: Kilimandjaro
 

"Advanced Packaging" — A must for the Next-Gen AI and HPC Hardware ! And not Only !

M.Bilal Hachemi

Yole Group, France



Advancing IC Substrate Manufacturing: Overcoming Challenges and Exploring Opportunities with 10µm Line/Space Technology

Stephan Trautweiler

GS Swiss PCB AG, Switzerland



Heterogeneous Integration and Wafer-level Packaging by Micro-transfer-printing

Sebastian Wicht, Sandra Gozdzik, Kavana Mandya Sreenivasa Setty, Tino Jäger

X-FAB MEMS Foundry GmbH, Germany

 
9:40am - 10:55amS 7C: Intreconnection Technologies
Location: Mont Blanc
 

A Novel Photo-patternable Epoxy Flux Material for A New Horizon in Fine Pitch Flip-chip Interconnections

Gwang-Mun Choi1, Jiho Joo1, Jungho Shin1, Jin-Hyuk Oh1, Ki-Seok Jang1, Chanmi Lee1, Gyeongmin Park2, Hyemi Lee2, Hyeryeon Hwang2, Ga-Eun Lee1, Seong-Cheol Kim1, Jaejun Lee2, Kwang-Seong Choi1, Yong-Sung Eom1

1Electronics and Telecommunications Research Institute, Korea, Republic of (South Korea); 2Pusan National University, Korea, Republic of (South Korea)



Femtosecond Laser Drilling Technologies for Through Glass Via (TGV) Fabrication in Customised Glass Interposers

Dimitris Karnakis

Oxford Lasers Ltd, United Kingdom



Integration Technology Development of Chip-Antenna Interface for Short Range mmWave Wireless Communication

Ran Yin1, Tilo Meister2, Mojtaba Sohrabi3, Krzysztof Nieweglowski1, Franz Alwin Dürrwald2, Christian Hoyer2, Frank Ellinger2, Dirk Plettemeier3, Karlheinz Bock1

1Institute of Electronic Packaging Technology, Technische Universität Dresden, Germany; 2Chair for Circuit Design and Network Theory, Technische Universität Dresden, Germany; 3Chair for RF and Photonics Engineering, Technische Universität Dresden, Germany

 
9:40am - 10:55amS 7D: Inspection and Test
Location: Makalu
 

Key Technologies and Design Aspects for Advanced FOCoS Packaging

Cheng Hsin Liu, Yi-Sheng Lin, Yu-Jen Chang, Chen-Chao Wang, Chin-Pin Hung

Advanced Semiconductor Engineering, Taiwan



Lensless Through-silicon Microscopy System for Precise Alignment in Photonic Integration Processes

Aleksandr Vlasov1, Igor Shevkunov2, Karen Egiazarian2, Andrei Gurovich1,4, Denis Rozhkov5, Mikko Närhi3, Jukka Viheriälä1, Mircea Guina1

1Optoelectronic Research Centre, ENS Faculty, Tampere University, Finland; 2Computational Imaging Group, ITC Faculty, Tampere University, FInland; 3Photonics Group, Tampere University, FInland; 4Ampliconyx Oy, Finland; 5TU Ilmenau, Germany



Investigating the Role of Thermal Effects in RF Immunity of MEMS Microphones

Margarita Chizh1, Matthias Schmidt2, Sebastian Kisban2, Bogdan Tanc2, Yogesh Babu3, Gregor Feiertag1, Matthias Winter3, Sushil Bharatan4

1Department of Electrical Engineering, Munich University of Applied Sciences, Munich, Germany; 2TDK Electronics AG, Munich, Germany; 3Centre for Research and Development, Rosenheim University of Applied Sciences, Rosenheim, Germany; 4TDK InvenSense, Boston, USA

 
10:55am - 11:30amBreak – Exhibition
11:30am - 12:45pmS 8A: Quality and Reliability
Location: Amphitheatre
 

Defining a Scalable Test Methodology to Deliver High Quality AI Products

Soumya Padmanabha, Gautam Nayak, Zhenxuan Zhang

Meta Platforms Inc., United States of America



Microstructural Characterization for the Joining Interface of Ag@Si Composite Sinter Joining for SiC Power Device by Scanning Transmission Electron Microscopy

Masahiko Nishijima1, Ran Liu1, Yang Liu1, Koji. S Nakayama1, Cuantong Chen1, Minoru Ueshima2, Katsuaki Suganuma1

1F3D system Integration Lab, SANKEN, Osaka University, Japan; 2Daicel Corporation



SACN doped solder balls alloys aging impact on BGA's reliability performance

Edwin Wakem Tangui, Laurence Capellaro, Nohora Caicedo

STMicroelectronics, France

 
11:30am - 12:45pmS 8B: Assembly and Manufcaturing
Location: Kilimandjaro
 

High density 3D interconnections for high performance CdTe based X-rays detectors

Jean-Michel Guinet1, Aline Meuris2, Olivier Limousin2, David Baudin3, Jeremy Chauveau1, Denis Chesnais1, Eric Tan1, Fabrice Soufflet1, Olivier Garel1

13D PLUS, France; 2Université Paris-Saclay, Université Paris Cité, CEA, CNRS, AIM; 3IRFU, CEA, Université Paris-Saclay



Atmospheric Plasma Cleaning of Copper Oxide and Tin Oxide for Flux-Free Interconnect Bonding

Daniel Pascual

Ontos Equipment Systems (OES), United States of America



A single step process for Die-attach and substrate-attach with pressure assisted sintering to face harsh conditions

Anne-Marie Laügt1, Mael Boland1, Melanie Mathon1, Battist Rabay2, Adrian Stelzer2, Julien Hossain2

1Inventec Preformance Chemicals, France; 2NANO-JOIN

 
11:30am - 12:45pmS 8C: Power Electronics
Location: Mont Blanc
 

Measurements at High Temperature for Thermal Resistance of MOSFETs

Corina Ruxandra Mitulescu (Sandulescu), Norocel Codreanu, Ciprian Ionescu, Paul Svasta, Mihai Branzei

National University of Science and Technology POLITEHNICA Bucharest, Romania



Influence of Uneven Chip Solder Layer Thickness on the Reliability of Power Modules

Aylin Aksoy, Florian Wagner, Marcel Sippel

Siemens AG, Germany



Reliability Evaluation of Direct Bonding for SiC Power Devices by Power Cycling Test

Marius Köhler1, Jens Müller2, Ansgar Ramesohl1, Kurt-Georg Besendörfer2, Nicolas Heuck1

1Hamm-Lippstadt University of Applied Sciences, Germany; 2Semikron Danfoss Elektronik GmbH & Co. KG, Nuremberg, Germany

 
11:30am - 12:45pmS 8D: Materials
Location: Makalu
 

Understanding Solder Creepage in Thin Si Devices Through Advanced Traceability Systems

Andrea Albertinetti1, Reiner Maghirang1, Chaimaa El Mazyani1, Abderrahim Kourimy1, Ismael Tahri2

1STMicroelectronics, Morocco; 2STMicroelectronics, France



Enhancing the Reliability of Harsh Environment Electronics Through PFAS-free Multilayer ALD + Parylene Coatings

Rakesh Kumar

Specialty Coating Systems, Inc., United States of America



Insulation Materials for Advanced Packaging Applications

Reki Nakano

Ajinomoto Co., Inc., Japan

 
12:45pm - 2:00pmLunch – Exhibition
2:00pm - 2:45pmKeynote 7
Location: Amphitheatre

"Charting a Path for the Chiplet Era and Beyond"
by Craig Bishop (Chief Technology Officer, Deca Technologies)

2:45pm - 3:15pmAwards and Closing
Location: Amphitheatre

 
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