Session | ||
S 5D: POSTER SESSION #2
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Presentations | ||
Microelectronic Packaging Challenges for Stacked Superconducting Qubit Chips Using Indium Bump Bonding 1Technology, STFC-RAL, United Kingdom; 2National Quantum Computing Centre (NQCC), STFC, United Kingdom; 3Central Laser Facility (CLF), STFC-RAL, United Kingdom Flip-chip Bonded Hybrid Germanium X-ray Detectors Suitable for Operating with Thermal Gradient Between Sensor and ASIC 1STFC-RAL, United Kingdom; 2STFC-DL, United Kingdom Thermal Management of an Electronic Module Made by a Solderless Assembly Method 1Syswin Solutions, Romania; 2Electronic Technology & Reliability Department, National University of Science and Technology Politehnica Bucharest, Romania; 3Department of Metallic Materials Sciences, Physical Metallurgy, Faculty of Materials Science and Engineering, National University of Science and Technology Politehnica Bucharest, Romania Selective Micro Laser Melting: Influence of Scan Speed and Laser Power on Interconnect Morphology and Performance Indian Institute of Science, Bengaluru, India Flip Chip Bonding of PMUT Using Adhesives and their Effect on Electrical Performance Silicon Austria Labs, Automated Non-destructive Mechanical Testing of Fine Pitch Wirebond Arrays Sandia National Laboratories, United States of America Advanced Underfill Developments Enabling Complex AI and HPC Package Designs Henkel Nederland BV, Netherlands, The Advanced Dielectric Films for Fusion Bonded 3D Integration Yokohama National University, Japan Printable non-volatile and volatile memristors based on Lead-Free Perovskites for artificial synapses and neurons emulation Hellenic Mediterranean University, Greece Power modules: Crack and shrinkage phenomenon PROTAVIC, France Void inspection using stress field imaging in densely patterned bonded wafers Semilab Co. Ltd., Hungary Photoresist/polymer removal optimized chemistry with adding hydrogen radical in MEMS process fabrication and other applications with HDRF® Plasma-Therm Europe, France Innovative deposition solution for TSV integration and conformal deposition of oxide, nitride, and metal layer with dual frequency pulsed equipment, application of low temperature deposition of dielectric layer Plasma-Therm Europe, France Temperature Profile Optimization for Vacuum Soldering of Components on Heat Sink 1University of West Bohemia, Czech Republic; 2Rohde & Schwarz závod Vimperk, s.r.o., Czech Republic Investigating the Dynamic Bending Behaviour of Biodegradable Printed Circuit Boards Budapest University of Technology and Economics, Hungary Stacked and Staggered Vias in FR4 laminate for special application Łukasiewicz Research Network - ITR, Poland Engineering Dual Alloy Solder Paste Systems to Achieve High Reliability, Energy Savings, Withstand High Junction Temperatures Indium Corporation Warpage Reduction of Laminate Substrates Through Metamodel-based Optimization of Material Properties 1CSA R&D ET Packaging Development, Materials and Simulation- ams OSRAM AG, Premstaetten, Austria; 2Institute of Materials Science and Testing of Polymers- Montanuniversität Leoben, Leoben, Austria; 3Simulation and Modeling- Polymer Competence Centre Leoben (PCCL) GmbH, Leoben, Austria; 4Surface Testing, Robot Vision and Artificial Intelligence- Polymer Competence Centre Leoben (PCCL) GmbH, Leoben, Austria |