Conference Time: 7th June 2025, 03:25:41pm CEST
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S 2A: Interconnection Technologies
Time:
Tuesday, 16/Sept/2025:
1:50pm - 3:05pm
Location: Amphitheatre
Presentations
Characterization of Chip-to-wafer Interconnects with Thick Gold Finish for Fan-out Wafer-level Packaging RDL First Integration
Arnaud Garnier , Laetitia Castagné, Guenaëlle Massignac, Rémi Franiatte, Daniel Mermin, Alain Gueugnot, Perceval Coudrain
Univ. Grenoble Alpes, CEA, Leti, Grenoble, France
Fine-pitch Die-to-wafer Bonding Technologies for Chiplet Integration
Juliana Panchenko 1,2 , Laura Wenzel1,2 , Steffen Bickel1 , Adil Shehzad1 , Fabian Hopsch3 , Sebastian Quednau4 , Manuela Junghaehnel1
1 All Silicon System Integration Dresden, Fraunhofer Institute for Reliability and Microintegration IZM, Dresden, Germany; 2 Institute of Electronic Packaging Technology, Technische Universität Dresden, Dresden, Germany; 3 Institutsteil Entwicklung Adaptiver Systeme EAS, Fraunhofer-Institut für Integrierte Schaltungen IIS, Dresden, Germany; 4 Nanowired GmbH, Emanuel-Merck-Straße 99, Gernsheim, Germany
Fabrication of Indium Interconnections for Flip-chip Assembly on Single Die
Mel Dehays , Sébastien Renet, Olivier Mailliart, Patrick Peray, Frédéric Berger, Guillaume Lamarache
Commissariat à l'énergie atomique (CEA), France
