The 25th European Microelectronics &
Packaging Conference (EMPC 2025)
16 – 18 September 2025
World Trade Center, Grenoble | France
Conference Agenda
Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).
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Session Overview | |
Location: Makalu |
Date: Tuesday, 16/Sept/2025 | |
11:15am - 12:30pm |
S 1D: Assembly and Manufacturing Location: Makalu Development of Advanced Screen-printing Technology for Flip-chip Transfer of Electronic Components Thinning and Dicing Process Integration of High Accuracy Using A Novel Self-assembly Stage for Chip on Wafer A Study of 355 nm UV Laser Ablation Process for Singulation of Silicon Wafers |
1:50pm - 3:05pm |
S 2D: Materials Location: Makalu Bi–in Segregation in Low-temperature SLID Bonding: Au-in-bi System Large Area (> 2500mm²) Sintering at Sub 220°C With Micro-scale Copper Flakes Influence of Total Encapsulation of White-light Mid-power LED Packages Over the Correlated Colour Temperature |
4:35pm - 5:50pm |
S 3D: Assembly and Manufactuirng Location: Makalu A New Carrier Tape for Direct Transfer Bonding (DTB) Process with Ultra-thin Chips Ultra-precise Dispensing for High-resolution Redistribution Layers and 3D Interconnects in Advanced Packaging Applications Plasma Influence for Polymer Uniform Spreading on Heterogeneous Surfaces |
Date: Wednesday, 17/Sept/2025 | |
11:15am - 12:30pm |
S 4D: POSTER SESSION #1 Location: Makalu Thermomechanical Study for Stress-management of Silicon Photonics Interposers Study on the Influence of Reflow Soldering on the Reliability of Mixed Solder Joints Reusing SMD Components on E-textiles: An Ageing Study by Combination of Corrosive Gases and Washing A Comparative Study of Silver Sintering Pastes for Die-attach Applications: Microstructure, Mechanical Properties, and Reliability Design and Evaluation of a Perforated Dielectric Flat Lens Antenna Array for D-band Applications A High Gain Antenna-in-Package (AiP) with Horn Structure for D-band Applications Fine-pitch Flip-chip Bonding Process with Laser Non-conductive Paste (NCP) and Laser-assisted Bonding (LAB) for High-reliability Electrochemical Analysis Reveals Effective Grain Refinement in Copper Electroplating Indium as the Superconducting Interconnect for Quantum Chiplets Test Equipment for Sensor Interfaces Emulated by Generic Electronic Control Unit Visualizing Vibrations of Electronic Modules in Test Grain Orientation Analysis for Thermal Cycling Evaluation of Die-attach Solder Joints Thermal Fatigue Resistance Improvement of New Al Bonding Wire Thermal Analysis of Power Electronic Modules with Parametric Model Order Reduction |
1:50pm - 3:30pm |
S 5D: POSTER SESSION #2 Location: Makalu Microelectronic Packaging Challenges for Stacked Superconducting Qubit Chips Using Indium Bump Bonding Flip-chip Bonded Hybrid Germanium X-ray Detectors Suitable for Operating with Thermal Gradient Between Sensor and ASIC Thermal Management of an Electronic Module Made by a Solderless Assembly Method Selective Micro Laser Melting: Influence of Scan Speed and Laser Power on Interconnect Morphology and Performance Flip Chip Bonding of PMUT Using Adhesives and their Effect on Electrical Performance Automated Non-destructive Mechanical Testing of Fine Pitch Wirebond Arrays Advanced Underfill Developments Enabling Complex AI and HPC Package Designs Advanced Dielectric Films for Fusion Bonded 3D Integration Printable non-volatile and volatile memristors based on Lead-Free Perovskites for artificial synapses and neurons emulation Power modules: Crack and shrinkage phenomenon Void inspection using stress field imaging in densely patterned bonded wafers Photoresist/polymer removal optimized chemistry with adding hydrogen radical in MEMS process fabrication and other applications with HDRF® Innovative deposition solution for TSV integration and conformal deposition of oxide, nitride, and metal layer with dual frequency pulsed equipment, application of low temperature deposition of dielectric layer Temperature Profile Optimization for Vacuum Soldering of Components on Heat Sink Investigating the Dynamic Bending Behaviour of Biodegradable Printed Circuit Boards Stacked and Staggered Vias in FR4 laminate for special application Engineering Dual Alloy Solder Paste Systems to Achieve High Reliability, Energy Savings, Withstand High Junction Temperatures Warpage Reduction of Laminate Substrates Through Metamodel-based Optimization of Material Properties |
Date: Thursday, 18/Sept/2025 | |
9:40am - 10:55am |
S 7D: Inspection and Test Location: Makalu Key Technologies and Design Aspects for Advanced FOCoS Packaging Lensless Through-silicon Microscopy System for Precise Alignment in Photonic Integration Processes Investigating the Role of Thermal Effects in RF Immunity of MEMS Microphones |
11:30am - 12:45pm |
S 8D: Materials Location: Makalu Understanding Solder Creepage in Thin Si Devices Through Advanced Traceability Systems Enhancing the Reliability of Harsh Environment Electronics Through PFAS-free Multilayer ALD + Parylene Coatings Insulation Materials for Advanced Packaging Applications |
Contact and Legal Notice · Contact Address: Privacy Statement · Conference: EMPC 2025 |
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