The 25th European Microelectronics &
Packaging Conference (EMPC 2025)
16 – 18 September 2025
World Trade Center, Grenoble | France
Conference Agenda
Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).
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Session Overview | |
Location: Mont Blanc |
Date: Tuesday, 16/Sept/2025 | |
11:15am - 12:30pm |
S 1C: Quality and Reliability Location: Mont Blanc Defining a Scalable Test Methodology to Deliver High Quality AI Products Embedding of components as an effective way to achieve high reliability for special applications products Assessment of QFN Assemblies’ Thermal Strain Characterization and its Evolution Through Thermal Cycling Aging |
1:50pm - 3:05pm |
S 2C: Special Topics Location: Mont Blanc Advanced Dielectric Films for Fusion Bonded 3D Integration A Miniaturized Dual Band (28/39 GHz) AiP Design for Millimeter-Wave 5G Mobile Phone Applications Development of a 3D Quilt Packaging Method for Implantable Applications |
4:35pm - 5:50pm |
S 3C: Quality and Reliability Location: Mont Blanc Microstructural Characterization for the Joining Interface of Ag@Si Composite Sinter Joining for SiC Power Device by Scanning Transmission Electron Microscopy Experimental and Numerical Investigation of the Impact of Surface Roughness of Copper Plated through Holes on Thermomechanical Reliability The Impact of Processing Conditions on Bond Reliability in Pressureless Silver Sintering |
Date: Wednesday, 17/Sept/2025 | |
11:00am - 12:15pm |
S 4C: IC Packagimg Location: Mont Blanc Impact of PFAS Removal on the Harsh Environment Reliability of Semiconductor Packaging FC-LGA for Power Devices: Peculiarities and Challenges Compared with Digital Products Modular Integration of Sensor-Chiplets using Rapid Prototyping including Interconnects and Protective Waveguide Packaging |
1:35pm - 3:15pm |
S 5C: Emerging Technologies Location: Mont Blanc TBM-free Plasma Etch Die Singulation Anti-counterfeit Semiconductor Package Using a Unique Identification Mark Metal Oxide Reduction Using Inline Openair-plasma Process to Enhance Adhesion and Improve Durability in Electronics Surface Conditioning of LTCC Substrates for Improved RF Signal Propagation |
3:50pm - 5:05pm |
S 6C: Materials Location: Mont Blanc Ag-nodule Mediated Bonding Using Liquid Quenched Ag-Si Alloy Thermal Characterization of Electrically Conductive Adhesives and Pressureless Sinter Pastes – Comparison of Data Sheet and Real Application Characterisation and Modelling of Sintered Joints Used in Power Electronics |
Date: Thursday, 18/Sept/2025 | |
9:40am - 10:55am |
S 7C: Intreconnection Technologies Location: Mont Blanc A Novel Photo-patternable Epoxy Flux Material for A New Horizon in Fine Pitch Flip-chip Interconnections Integration Technology Development of Chip-Antenna Interface for Short Range mmWave Wireless Communication |
11:30am - 12:45pm |
S 8C: Power Electronics Location: Mont Blanc Measurements at High Temperature for Thermal Resistance of MOSFETs Influence of Uneven Chip Solder Layer Thickness on the Reliability of Power Modules Reliability Evaluation of Direct Bonding for SiC Power Devices by Power Cycling Test |