The 25th European Microelectronics &
Packaging Conference (EMPC 2025)
16 – 18 September 2025
World Trade Center, Grenoble | France
Conference Agenda
Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).
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Session Overview | |
| Location: Auditorium |
| Date: Monday, 15/Sept/2025 | |
| 5:00pm - 6:00pm |
IEEE EPS Distinguished Lecture Location: Auditorium "Recent Advances and Trends in Packaging" Lecturer: John Lau, Unimicron Technology Corporation |
| Date: Tuesday, 16/Sept/2025 | |
| 9:00am - 9:10am |
Welcome and Conference Opening Location: Auditorium |
| 9:10am - 9:55am |
Keynote 1 Location: Auditorium "Propelling AI forward through Advanced Packaging Creativity" by Ingu Yin Chang (Executive Vice President, ASE Inc.) |
| 9:55am - 10:40am |
Keynote 2 Location: Auditorium "The Interconnect 'Panelization'" by Laurent Herard (Group VP – Head of Back End Manufacturing & Technology R&D, STMicroelectronics) |
| 11:15am - 12:30pm |
S 1A: IC Packaging Location: Auditorium Development of Die Attach Process for Thin Device Using a Novel High Thermal Conductivity Pressure-less Semi-sintering Paste with Capillary Filling Technology A Novel Package Technology for Better MOSFET Performance Fan Out Wafer Level Packaging – Towards a European Manufacturing Supply Chain |
| 1:50pm - 3:05pm |
S 2A: Design, Modelling and Simulation Location: Auditorium A Methodology for Modeling Capillary Underfill (CUF) in Advanced Packaging Simulation-based Analysis of Thermal Effects Induced by RF Interference in MEMS Microphones Numerical Case Study of Stress and Plastic Strain Distributions in BGA Solder Balls by Comparison of a Novel Inorganic Encapsulation and Conventional Underfill Variants |
| 3:40pm - 4:25pm |
Keynote 3 Location: Auditorium "Mass Transfer: How the Push for MicroLED Displays Opens New Paths to Heterogeneous Integration" by Dr. Chris Bower (CTO and Co-founder, X Display Company (XDC)., Inc.) |
| 4:35pm - 5:50pm |
S 3A: Materials Location: Auditorium Exploration of Cu Interfacial Engineering to Enhance Cu Interconnects Reliability Tailored Polymers for Wafer-level Optics Manufacturing via Nanoimprint Lithography Evaluations of Transient Liquid Phase Joints Using In-coated Ag Sheet |
| Date: Wednesday, 17/Sept/2025 | |
| 8:45am - 9:30am |
Keynote 4 Location: Auditorium "Recent Trends in Automotive Power Module Designs and Technology for Traction Inverters" by Dr. Uwe Hansen (VP Power Component Development, Bosch) |
| 9:30am - 10:15am |
Keynote 5 Location: Auditorium "System Technology Co-optimization for Advanced 3D & Heterogeneous Integration" by Sébastien Dauvé (CEO, CEA-Leti) |
| 11:00am - 12:15pm |
S 4A: Assembly and Manufacturing Location: Auditorium In-situ Plasma Monitoring Study for Wire Bonding Process Improvements Impact and Control of Residual Stress in Ceramic Packages Wafer dicing technique for close-butted assemblies |
| 1:35pm - 3:15pm |
S 5A: Substrate Technologies Location: Auditorium Approach for Extracting the Relative Permittivity Using a Ring Resonator Fabricated on an LTCC Substrate Insulation Layers on Copper Surfaces of Ceramic Circuit Boards for Smart Power Modules Optimized Castellated Hole Interconnects for Ceramic-based Modular Millimeter-Wave Applications up to 85 GHz Glasses as substrates for packaging: Remarks on mechanic reliability. |
| 3:50pm - 5:05pm |
S 6A: System in Package Location: Auditorium Highly Integrated Low Power Wireless Sensor Node Advancing Fan-Out Wafer-Level Packaging for III-V/CMOS Optoelectronic Transceiver SiP Integration Investigation of RF Characteristics of Inter-Chiplet Connections for Advanced HPC Packaging Solutions |
| Date: Thursday, 18/Sept/2025 | |
| 8:45am - 9:30am |
Keynote 6 Location: Auditorium "Advanced Packaging – The Key Technology for Chiplet Integration" by Prof. Dr.-Ing. Ulrike Ganesh (Managing Director, Fraunhofer IZM) |
| 9:40am - 10:55am |
S 7A: Smart Manufacturing Location: Auditorium Inkjet Printing of Copper Metallization for Silicon Carbide MOSFETs Development of a Novel Pure-ag-sintering Paste for a Jet-dispensing Process to Achieve Highest Possible Conductivity for Miniaturized Electronic Components with a Pressure-less Sintering Process Additive Manufacturing of High-Performance Ceramics for Fabricating Single- and Multi-Material Components |
| 11:30am - 12:45pm |
S 8A: Materials Location: Auditorium Understanding Solder Creepage in Thin Si Devices Through Advanced Traceability Systems Enhancing the Reliability of Harsh Environment Electronics Through PFAS-free Multilayer ALD + Parylene Coatings Insulation Materials for Advanced Packaging Applications |
| 2:00pm - 2:45pm |
Keynote 7 Location: Auditorium "Charting a Path for the Chiplet Era and Beyond" by Craig Bishop (Chief Technology Officer, Deca Technologies) |
| 2:45pm - 3:15pm |
Awards and Closing Location: Auditorium |