The 25th European Microelectronics &
Packaging Conference (EMPC 2025)
16 – 18 September 2025
World Trade Center, Grenoble | France
Conference Agenda
Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).
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Session Overview |
Date: Wednesday, 17/Sept/2025 | ||||
9:00am - 9:45am |
Keynote 4 Location: Amphitheatre "Recent Trends in Automotive Power Module Designs and Technology for Traction Inverters" by Dr. Uwe Hansen (VP Power Component Development, Bosch) |
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9:45am - 10:30am |
Keynote 5 Location: Amphitheatre "System Technology Co-optimization for Advanced 3D & Heterogeneous Integration" by Sébastien Dauvé (CEO, CEA-Leti) |
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10:30am - 11:15am |
Break – Posters – Exhibition |
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11:15am - 12:30pm |
S 4A: Assembly and Manufacturing Location: Amphitheatre In-situ Plasma Monitoring Study for Wire Bonding Process Improvements Impact and Control of Residual Stress in Ceramic Packages Wafer dicing technique for close-butted assemblies |
S 4B: Design, Modelling and Simulation Location: Kilimandjaro Intelligent Prediction of Warpage in Molded fcBGA Packages: An Optimization and Modeling Approach Comparative FEA Analysis of Cu Clip and Al Wire Bonding in Power Discrete Packages Investigation of thermal performance of various thermal interface materials used in top-side-cooled MOSFETs |
S 4C: IC Packagimg Location: Mont Blanc Impact of PFAS Removal on the Harsh Environment Reliability of Semiconductor Packaging FC-LGA for Power Devices: Peculiarities and Challenges Compared with Digital Products Modular Integration of Sensor-Chiplets using Rapid Prototyping including Interconnects and Protective Waveguide Packaging |
S 4D: POSTER SESSION #1 Location: Makalu Thermomechanical Study for Stress-management of Silicon Photonics Interposers Study on the Influence of Reflow Soldering on the Reliability of Mixed Solder Joints Reusing SMD Components on E-textiles: An Ageing Study by Combination of Corrosive Gases and Washing A Comparative Study of Silver Sintering Pastes for Die-attach Applications: Microstructure, Mechanical Properties, and Reliability Design and Evaluation of a Perforated Dielectric Flat Lens Antenna Array for D-band Applications A High Gain Antenna-in-Package (AiP) with Horn Structure for D-band Applications Fine-pitch Flip-chip Bonding Process with Laser Non-conductive Paste (NCP) and Laser-assisted Bonding (LAB) for High-reliability Electrochemical Analysis Reveals Effective Grain Refinement in Copper Electroplating Indium as the Superconducting Interconnect for Quantum Chiplets Test Equipment for Sensor Interfaces Emulated by Generic Electronic Control Unit Visualizing Vibrations of Electronic Modules in Test Grain Orientation Analysis for Thermal Cycling Evaluation of Die-attach Solder Joints Thermal Fatigue Resistance Improvement of New Al Bonding Wire Thermal Analysis of Power Electronic Modules with Parametric Model Order Reduction |
12:30pm - 1:50pm |
Lunch Break – Posters – Exhibition |
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1:50pm - 3:30pm |
S 5A: Substrate Technologies Location: Amphitheatre Approach for Extracting the Relative Permittivity of Sol-gel Using a Ring Resonator Fabricated on an LTCC Substrate Insulation Layers on Copper Surfaces of Ceramic Circuit Boards for Smart Power Modules Optimized Castellated Hole Interconnects for Ceramic-based Modular Millimeter-Wave Applications up to 85 GHz Glasses as substrates for packaging: Remarks on mechanic reliability. |
S 5B: Optoelectronics Location: Kilimandjaro Precise Alignment and Laser-assisted Bonding of Multichannel Laser Diode Chips for Silicon Photonics Integration Assembly Perspectives on Flip-chip Integration of 1x, 4x and 8x Array InP-SiN Hybrid Laser Devices to Si Photonics Wafers with Sub-500 nm Misalignment TSVs Mechanical Stress Measurements on Silicon Wave-guide Using Phase Shift Interferometry Package and Process Development of Molded Image Sensor Package |
S 5C: Emerging Technologies Location: Mont Blanc TBM-free Plasma Etch Die Singulation Anti-counterfeit Semiconductor Package Using a Unique Identification Mark Metal Oxide Reduction Using Inline Openair-plasma Process to Enhance Adhesion and Improve Durability in Electronics Surface Conditioning of LTCC Substrates for Improved RF Signal Propagation |
S 5D: POSTER SESSION #2 Location: Makalu Microelectronic Packaging Challenges for Stacked Superconducting Qubit Chips Using Indium Bump Bonding Flip-chip Bonded Hybrid Germanium X-ray Detectors Suitable for Operating with Thermal Gradient Between Sensor and ASIC Thermal Management of an Electronic Module Made by a Solderless Assembly Method Selective Micro Laser Melting: Influence of Scan Speed and Laser Power on Interconnect Morphology and Performance Flip Chip Bonding of PMUT Using Adhesives and their Effect on Electrical Performance Automated Non-destructive Mechanical Testing of Fine Pitch Wirebond Arrays Advanced Underfill Developments Enabling Complex AI and HPC Package Designs Advanced Dielectric Films for Fusion Bonded 3D Integration Printable non-volatile and volatile memristors based on Lead-Free Perovskites for artificial synapses and neurons emulation Power modules: Crack and shrinkage phenomenon Void inspection using stress field imaging in densely patterned bonded wafers Photoresist/polymer removal optimized chemistry with adding hydrogen radical in MEMS process fabrication and other applications with HDRF® Innovative deposition solution for TSV integration and conformal deposition of oxide, nitride, and metal layer with dual frequency pulsed equipment, application of low temperature deposition of dielectric layer Temperature Profile Optimization for Vacuum Soldering of Components on Heat Sink Investigating the Dynamic Bending Behaviour of Biodegradable Printed Circuit Boards Stacked and Staggered Vias in FR4 laminate for special application Engineering Dual Alloy Solder Paste Systems to Achieve High Reliability, Energy Savings, Withstand High Junction Temperatures Warpage Reduction of Laminate Substrates Through Metamodel-based Optimization of Material Properties |
3:30pm - 4:05pm |
Break – Posters – Exhibition |
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4:05pm - 5:20pm |
S 6A: System in Package Location: Amphitheatre Highly Integrated Low Power Wireless Sensor Node Advancing Fan-Out Wafer-Level Packaging for III-V/CMOS Optoelectronic Transceiver SiP Integration RF Characterization of Microscale Transmission Lines on Polymer-based Silicon Interposers for HPC Applications |
S 6B: Quality and Reliability Location: Kilimandjaro Advanced Defects Repair Techniques for Enhancing Yield in Packaging Architectures Prognostics and Health Monitoring: Case Study of a Light Rail Vehicle Power Converter Assembly Optimizing Ag Paste Thickness for Reliable Power Module Packaging |
S 6C: Materials Location: Mont Blanc Ag-nodule Mediated Bonding Using Liquid Quenched Ag-Si Alloy Thermal Characterization of Electrically Conductive Adhesives and Pressureless Sinter Pastes – Comparison of Data Sheet and Real Application Characterisation and Modelling of Sintered Joints Used in Power Electronics |
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5:45pm | Bus transfer: Busses leaving venue for confernce dinner |
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7:00pm - 10:00pm |
Conference Dinner |
Contact and Legal Notice · Contact Address: Privacy Statement · Conference: EMPC 2025 |
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