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Using 3D models for ESD protection devices for Signal Integrity and ESD Simulations
Time:
Monday, 01/Sept/2025:
9:00am - 10:30am
Location:Room 105
75 seats, Tower 44, 1st floor
Session Abstract
Until now, system-level simulations that include electrostatic discharge (ESD) protection devices have relied on strong simplifications of the ESD device itself. For Signal Integrity (SI) simulations, high-speed engineers typically use simple capacitors or basic RLC circuits to introduce some level of realism. In ESD simulations, the industry has adopted the System Efficient ESD Design (SEED) methodology, which utilizes Transmission Line Pulsed (TLP) data to replicate the behavior of ESD devices under pulsed conditions. The simulation is then performed at the circuit level, incorporating simplifications and model reductions based on SPICE modeling.
In this workshop, we demonstrate how electronic components, including ESD devices, can be modeled as 3D structures. We will present a step-by-step process for developing these models, selecting and validating the electrical parameters of materials. Additionally, we will explore their application in SI simulations, showcasing results in both the frequency and time domains.
Building on this, we integrate these 3D models with the SEED methodology for ESD simulations. Finally, we discuss their impact at the system level, illustrating how these models enhance simulation accuracy—particularly in terms of S-parameters and ESD clamping behavior.
Presentations
9:00am - 9:30am
Using 3D models for SI simulations of ESD protection devices and EMI filters
Jennifer Schütt, Preethi Subbaraju
Nexperia Germany GmbH, Germany
For high-speed interfaces, 3D modeling of devices is increasingly necessary to analyze signal integrity (SI) performance. This presentation will cover 3D modeling of high-speed packages for ESD devices and EMI filters, along with post-processing techniques for SI analysis.
9:30am - 10:00am
SEED Simulations for Optimal System-level ESD Protection
Sergej Bub
Nexperia Germany GmbH, Germany
To optimize system against ESD, SEED modelling and simulation approach will be introduced first. The non-linear turn-on characteristic of ESD protection components with snapback will be modeled applying specific behavioral dynamic models. Finally, different optimization scenarios including ESD protection device and layout parameters, as also impact of PCB parasitics and placement strategies will be discussed.
10:00am - 10:30am
System level simulations
Richard Sjiariel, Andreas Barchanski
DS Deutschland GmbH
Building upon the foundation of the component modeling presented at the beginning of the workshop, we perform system level simulation of realistic electronic system. We analyze these systems in terms of filtering, emission and ESD performance.
