Conference Agenda

A Framework for Chiplet Authentication During Post-Stacking Test

Juan Suzano¹, Anthony Philippe³, Fady Abouzeid², Giorgio Di Natale¹, Philippe Roche²

¹TIMA; ²ST Microelectronics; ³CEA

A Model-Driven Approach to Variable-Frequency Clock Synthesis for PSN-Resilient IC Wake-Up

Vipin Kumar Singh¹, Vijay Pratap Yadav¹, Vassilis Alimisis^2,3, Paul P Sotiriadis^2,3, Shubhankar Majumdar⁴, Alak Majumder¹

¹NIT Arunachal Pradesh, India; ²Archimedes, Athena Research Center, Marousi, Greece; ³National Technical University of Athens, Greece; ⁴NIT Meghalaya, India

Ageing Monitoring for Commercial Microcontrollers Based on Timing Windows

Leandro Lanzieri^1,2,3, Jiri Kral¹, Goerschwin Fey², Holger Schlarb¹, Thomas C. Schmidt³

¹Deutsches Elektronen-Synchrotron DESY, Germany; ²Hamburg University of Technology, Germany; ³Hamburg University of Applied Sciences, Germany

ANN-Based Ultra Fast Synthesis of Flash ADCs

Hakan Taşkıran, Abdullah Bayram, Engin Afacan

Gebze Technical University, Turkey (Türkiye)

Approximated MAGIC-ReRAM Adder Circuits for Low-Latency In-Memory Computing

Saeideh Nabipour¹, Chandan Kumar Jha², Saeideh Shirinzadeh^1,3, Rolf Drechsler^1,2

¹Cyber-Physical Systems, DFKI GmbH, Germany; ²University of Bremen, Germany; ³Fraunhofer Institute for Systems and Innovation Research (ISI), Karlsruhe, Germany

Comparative Analysis of Hardware Accelerator Architectures for Performance and Energy Efficient Deep Neural Network Execution

Salsabil Saoudi¹, Mario Barbareschi², Alberto Bosio¹

¹Ecole Centrale de Lyon, INSA Lyon, CNRS, Université Claude Bernard Lyon 1, CPE Lyon, INL (UMR 5270), 69130 Ecully, France; ²University of Naples Federico II, Department of Electrical Engineering and Information Technologies, 80125 Naples, Italy

Efficient Co-Design of Networked Control Systems with 5G Configured Grant Scheduling

Yungang Pan¹, Max Nyberg Carlsson², Soheil Samii¹, Petru Eles¹, Zebo Peng¹

¹Embedded Systems Lab, Linköping University, Sweden; ²Department of Automatic Control, Lund University, Sweden

Error Injecting Circuit: an Alternative to Discrete Gaussian Samplers

Andrea Marenco¹, Emanuele Valea¹, Elena Ioana Vatajelu²

¹CEA List; ²TIMA-CNRS

Fan-In Aware Graph-Based Optimization for MAC-Based In-Memory Computing

Fatemeh Shirinzadeh¹, Abhoy Kole¹, Kamalika Datta^1,2, Saeideh Shirinzadeh^1,3, Rolf Drechsler^1,2

¹German Research Centre for Artificial Intelligence (DFKI), Germany; ²Institute of Computer Science, University of Bremen, Germany; ³Fraunhofer Institute for Systems and Innovation Research (ISI), Germany

Monolithic quantum random number generator containing Si-LED, SPAD and analog processing

Horst Zimmermann, David Bugl, Bernhard Goll, Michael Hofbauer, Kerstin Schneider-Hornstein, Hiwa Mahmoudi

TU Wien, Austria

Pulsed Electromagnetic Fault Injection on RO-based True Random Number Generators in FPGAs

Sami El Amraoui¹, Mahdi Allaw¹, Florian Pebay-Peyroula², Régis Leveugle¹, Paolo Maistri¹

¹Univ. Grenoble Alpes, CNRS, Grenoble INP, TIMA; ²CEA-Leti

Security-Aware Benchmarks for Performance Exploration of CHERI-Enabled Architectures

Spandan Das¹, Sayak Deb², Khushboo Qayyum³, Sallar Ahmadi-Pour¹, Christoph Lüth^1,3, Rolf Drechsler^1,3

¹Institute of Computer Science, University of Bremen, Bremen, Germany; ²Institute of Physics and Electrical Engineering, University of Bremen, Bremen, Germany; ³Cyber-Physical Systems, DFKI GmbH, Bremen, Germany

BLAR-3D: Beta-Regulated Learning-Based Adaptive Routing for 3D Network-on-Chip

Cevdet Aslan, Suleyman Tosun

Hacettepe University, Turkey (Türkiye)

Influence of Temperature Variations on the Frequency of Two-dimensional MEMS Mirrors

Marlene Alexandra Schneider^1,2, Norbert Druml², David Brunner²

¹Technische Universität Graz; ²Infineon Technologies Austria AG