Conference Agenda

Session Overview
 
Date: Friday, 26/Apr/2019
9:00am
-
10:30am
Session 4: HW Design for Communication Networks
Location: Doubletree by Hilton City Plaza
Chair: Dominik Macko, Faculty of Informatics and Information Technologies, Slovak University of Technology in Bratislava
 

Modular Data Link Layer Processing for THz Communication

Lukasz Lopacinski1, Mohamed Hussein Eissa1, Goran Panic1, Alireza Hasani1,2, Rolf Kraemer1,2

1: IHP – Leibniz-Institut für innovative Mikroelektronik, Germany; 2: Brandenburgische Technische Universität Cottbus - Senftenberg



Hash-based Pattern Matching for High Speed Networks

Tomáš Fukač, Jan Kořenek

Faculty of Information Technology Brno University of Technology, Czech Republic



Acceleration of Feature Extraction for Real-Time Analysis of Encrypted Network Traffic

Roman Vrána, Jan Kořenek, David Novák

Faculty of Information Technology, Brno University of Technology, Czech Republic

10:30am
-
11:00am
Poster Session 3
Location: Doubletree by Hilton City Plaza
 

Nonlinear Compression Codes Used In IC Testing

Ondrej Novak

TU Liberec, Czech Republic



Radiation- and Temperature-Induced Fault Modeling and Simulation in BiCMOS LSI’s Components using RAD-THERM TCAD Subsystem

Konstantin Petrosyants1, Maxim Kozhukhov2, Dmitry Popov1

1: National Research University Higher School of Economics (Moscow Institute of Electronics and Mathematics), Moscow, Russia; 2: JC ‘VNIIEM Corporation’, Moscow, Russia



Run-Time Reconfigurable Fault Tolerant Architecture for Soft-Core Processor NEO430

Karel Szurman, Zdenek Kotasek

Faculty of Information Technology, Brno University of Technology, Czech Republic



Testability Measures Considering Circuit Reconvergence to Reduce ATPG Runtime

Kai-Hsun Chen2, Ching-Yuan Chen1, Jiun-Lang Huang1,2

1: Graduate Institute of Electronics Engineering (GIEE), National Taiwan University, Taipei, Taiwan; 2: Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan



Comparison of Nearest Neighbours Algorithms for PET Image Reconstruction on FPGA

Zoltan Nagy1, Andras Kiss1, Levente Mark Santha1,2, Kristof Karacs1

1: Pázmány Péter Catholic University, Budapest, Hungary; 2: Institute for Computer Science and Control Hungarian Academy of Sciences, Budapest, Hungary



A Global Sensitivity Analysis Method Based on Local Regression

Ingrid Kovacs1, Alexandra Iosub2, Marina Topa1, Andi Buzo3, Georg Pelz3

1: Technical University of Cluj-Napoca, Romania; 2: Gheorghe Asachi Technical University of Iași, Romania; 3: Infineon Technologies AG, Neubiberg, Germany

11:00am
-
12:30pm
Session 5: Student Session
Location: Doubletree by Hilton City Plaza
Chair: Ondrej Novak, TU Liberec
 

Design of a True Random Number Generator Based on Low Power Oscillator with Increased Jitter

Mariusz Derlecki, Krzysztof Siwiec, Pawel Narczyk, Witold Adam Pleskacz

Warsaw University of Technology, Poland



Analyzing and Optimizing the Dummy Rounds Scheme

Stanislav Jeřábek, Jan Schmidt

Czech Technical University in Prague, Czech Republic



Automated Integration of Dynamic Power Management into FPGA-Based Design

Michal Škuta, Dominik Macko

Faculty of Informatics and Information Technologies, Slovak University of Technology in Bratislava, Slovak Republic



Development of Wearable Hardware Platform to Measure the ECG and EMG with IMU to Detect Motion Artifacts

Muhammad TANWEER, Kari Halonen

Aalto University, Finland

12:30pm
-
2:00pm
Lunch
Location: Doubletree by Hilton City Plaza
2:00pm
-
3:30pm
Session 6: HW Design at Application-Level
Location: Doubletree by Hilton City Plaza
Chair: Petr Fišer, Czech Technical University in Prague
 

Fault Tolerant Control System of the Rotary Hearth Furnace Servicing Machines

Vlad Muresan, Mihail Abrudean

UTCN, Romania



Hardware and Control Design of a Ball Balancing Robot

Ioana Lal1, Marius Nicoara1, Alexandru Codrean2, Lucian Busoniu2

1: Robert Bosch, Romania; 2: Technical University of Cluj-Napoca, Romania



A hardware friendly rational function approximation evaluator

Silviu-Ioan Filip

Inria, France

3:30pm
-
4:00pm
Closing Session
Location: Doubletree by Hilton City Plaza