Conference Agenda

Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).

Session Overview
Special Session: From Constraints to Tape-Out: Towards a Continuous AMS Design Flow
Wednesday, 24/Apr/2019:
4:30pm - 6:00pm

Session Chair: Manfred Dietrich, Dikuli Unternehmensberatung
Location: Doubletree by Hilton City Plaza

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Flexible Generation of Analog Integrated Layouts Using a Novel Floorplanning-Driven P&R Approach

Benjamin Prautsch1, Uwe Hatnik1, Jens Lienig2, Jens Benndorf3

1Fraunhofer IIS/EAS Dresden; 2TU Dresden; 3Dream Chip Technologies GmbH

A fault-free and verified layout is the final result of the analog design flow. One approach particular-ly aiding layout design is generator-based automation. Generators create layouts fast in a parame-terizable and structurally pre-defined bottom-up way. However, limited structural flexibility and limited access to formalized requirements are disadvantages of generators. This work introduces a new generator concept that allows a mixture of both recent bottom-up layout description and ab-stract top-down layout description. Both constructive and iterative algorithms that use formal con-straints as input aid the bottom-up and top-down styles, respectively. This way, we overcome limits of procedural generators and generation gets standardized in a template-based way. The new ap-proach bridges the gap between procedural bottom-up generators and optimization-based top-down approaches being a step towards a continuous analog design automation flow.

Invasive Analysis Framework for non-functional Effect Verification

Georg Gläser1, Martin Grabmann1, Dirk Nuernbergk2

1IMMS GmbH; 2Melexis GmbH

Modern methods for system analysis and verification demand for either refining a given model or evaluating the impact of certain changes as for instance in design space exploration. In Ana-log/Mixed-Signal systems the hand-made models show the purely functional behavior. For includ-ing non-functional effects such as sensitivity for power supply non-idealities, the models have to be refined. In this contribution, we present a framework for processing Verilog-AMS models. This framework can be used to structurally modify a given system and interface to an industrial simula-tion environment for paving the way to novel analysis and refinement methods. We demonstrate our framework by introducing a method for automated extraction of operating condition checks to system level. In addition, a method for analyzing the impact of parasitic elements in a layout ex-tracted netlist and include a discussion about further potential applications of invasive analysis in AMS systems.

Resolving Dependencies in Hierarchical AMS Designs Using Constraint Propagation and Budgeting

Andreas Krinke1, Tilman Horst1, Jens Lienig1, Goeran Jerke2

1TU Dresden; 2Robert Bosch GmbH

Complex global dependencies complicate the separate design of individual modules, because de-sign decisions in one module may influence and ultimately violate constraints in other modules. In this work, we propose a methodology to make constraints visible and verifiable in all relevant mod-ules throughout the hierarchy. The constraints from the system specification as well as those added later by designers are propagated within the design hierarchy. At the end of this process, we know the set of relevant constraints including, e.g., geometrical dimensions and pin positions, for every module. If the final layout fulfills all these constraints, the correct operation of the overall system according to the specification can be guaranteed.

Schematic Generation Framework in a Mixed Signal Top Down Design Flow

Tobias Markus1, Markus Mueller2, Ulrich Brue-ning3

1ZITI University Heidelberg; 2Extoll GmbH; 3Universität Heidelberg

This work demonstrates an important step inside the Mixed-Signal Top-Down Design Flow which focuses on the schematic generation framework from the System-Level Model. The structural hier-archy and schematics for the Full Custom part are generated from the System-Level SystemVerilog RNM model. Furthermore, the developed method offers a framework which automatically detects general models in the leaf cells and runs corresponding dimensioning scripts. The framework is flexible and calls user defined dimensioning scripts which can range from simple scripts to abstract approaches. The flow was used with great success in eliminating structural inconsistencies, related errors and avoiding additional rework. Additionally, it provides high automation which reduces the design time.